tdc_bank Entity Reference

Inherits tdc, and tdc_output.

Entities
tdc_bank_arch	architecture

Libraries
ieee
rtl

Use Clauses
std_logic_1164
numeric_std
math_real
all
tdc_pack	Package <tdc_pack>

Generics
length_coarse_g	positive := 1
length_fine_g	positive := 1
depth_g	positive := 4
count_g	positive := 2
width_g	positive := 32

Ports
clock_i	in std_logic
delta_i	in std_logic
sel_i	in std_logic_vector ( sel_width ( count_g ) - 1 downto 0 )
coarse_delay_i	in std_logic_vector ( coarse_width ( count_g ) - 1 downto 0 )
fine_delay_i	in std_logic_vector ( fine_width ( count_g ) - 1 downto 0 )
delta_o	out std_logic_vector ( count_g- 1 downto 0 )
weights_o	out std_logic_vector ( weight_width ( depth_g ) * count_g- 1 downto 0 )
state_o	out std_logic_vector ( state_width ( depth_g ) - 1 downto 0 )
weight_o	out std_logic_vector ( width_g- 1 downto 0 )