tdc_output Entity Reference

Inherits tdc_exp_sum.

Inherited by tdc_bank.

Entities
tdc_output_arch	architecture

Libraries
ieee
rtl

Use Clauses
std_logic_1164
numeric_std
math_real
tdc_pack	Package <tdc_pack>

Generics
depth_g	positive := 4
count_g	positive := 2
width_g	positive := 32

Ports
clock_i	in std_logic
sel_i	in std_logic_vector ( sel_width ( count_g ) - 1 downto 0 )
state_i	in std_logic_vector ( state_width ( depth_g ) * count_g- 1 downto 0 )
weight_o	out std_logic_vector ( width_g- 1 downto 0 )
weights_o	out std_logic_vector ( weight_width ( depth_g ) * count_g- 1 downto 0 )
state_o	out std_logic_vector ( state_width ( depth_g ) - 1 downto 0 )