ro_output Entity Reference

Inherits state_diff, and ro_exp_sum.

Inherited by ro_bank.

Entities
ro_output_arch	architecture

Libraries
ieee
rtl

Use Clauses
std_logic_1164
numeric_std
math_real
ro_pack	Package <ro_pack>

Generics
count_g	positive := 16
depth_g	positive := 8
width_g	positive := 32

Ports
clock_i	in std_logic
state_i	in std_logic_vector ( count_g* state_width ( depth_g ) - 1 downto 0 )
sel_i	in std_logic_vector ( sel_width ( count_g ) - 1 downto 0 )
step_o	out std_logic_vector ( width_g- 1 downto 0 )
steps_o	out std_logic_vector ( count_g* state_width ( depth_g ) - 1 downto 0 )
state_o	out std_logic_vector ( state_width ( depth_g ) - 1 downto 0 )