Inherited by sampling_line.
Entities | |
sampling_block_arch | architecture |
Libraries | |
ieee | |
unisim | |
rtl |
Use Clauses | |
std_logic_1164 | |
vcomponents | |
tdc_pack | Package <tdc_pack> |
Ports | |
clock_i | in std_logic |
delta_i | in std_logic |
delta_o | out std_logic |
state_o | out std_logic_vector ( bits_per_depth_c- 1 downto 0 ) |
Attributes | |
dont_touch | string |
dont_touch | sampling_block : entity is " true " |