Inherited by ro_bank.
Entities | |
| ro_arch | architecture | 
Libraries | |
| ieee | |
| unisim | |
Use Clauses | |
| std_logic_1164 | |
| vcomponents | |
Generics | |
| depth_g | positive := 8 | 
Ports | |
| clock_i | in std_logic | 
| state_o | out std_logic_vector ( depth_g- 1 downto 0 ) | 
Attributes | |
| dont_touch | string | 
| dont_touch | ro : entity is " true " | 
| allow_combinatorial_loops | string | 
| allow_combinatorial_loops | ro : entity is " true " |