sca-ip-hdl
fine_line_arch Architecture Reference

Components

fine_block  <Entity fine_block>
clock_mux  <Entity clock_mux>

Types

delta_array_t ( 0 to length_g ) std_logic_vector ( 4 downto 0 )
clock_array_t ( 0 to length_g- 1 ) std_logic_vector ( 3 downto 0 )

Signals

delta_s  delta_array_t
clocks_s  clock_array_t

Instantiations

block_0  fine_block <Entity fine_block>
block_1  fine_block <Entity fine_block>
block_2  fine_block <Entity fine_block>
block_3  fine_block <Entity fine_block>
mux  clock_mux <Entity clock_mux>