sca-ip-hdl
clock_mux Entity Reference

Inherited by coarse_line, and fine_line.

Entities

clock_mux_arch  architecture
 

Libraries

ieee 
unisim 

Use Clauses

std_logic_1164 
vcomponents 

Ports

clocks_i   in std_logic_vector ( 3 downto 0 )
delay_i   in std_logic_vector ( 1 downto 0 )
clock_o   out std_logic

Attributes

dont_touch  string
dont_touch  clock_mux : entity is " true "