tdc_exp_sum_arch Architecture Reference

Processes
sums_reg	( clock_i )

Constants
state_width_c	positive := in_width_g
weight_width_c	positive := out_width_g
sum_depth_c	positive := integer ( ceil ( log2 ( real ( in_width_g ) ) ) )

Types
state_array_t	( 0 to state_width_c- 1 ) unsigned ( weight_width_c- 1 downto 0 )
sums_matrix_t	( 0 to sum_depth_c- 1 ) state_array_t

Signals
curr_sums_s	sums_matrix_t
next_sums_s	sums_matrix_t