behavioral Architecture Reference

Processes
PROCESS_0	( clk )

Components
gamma	<Entity gamma>
pi	<Entity pi>
tau	<Entity tau>
key_schedule	<Entity key_schedule>

Signals
data_state	std_logic_vector ( 63 downto 0 )
data_sigma	std_logic_vector ( 63 downto 0 )
data_gamma	std_logic_vector ( 63 downto 0 )
data_pi	std_logic_vector ( 63 downto 0 )
data_tau	std_logic_vector ( 63 downto 0 )
key_state	std_logic_vector ( key_bits ( k ) - 1 downto 0 )
key_updated	std_logic_vector ( key_bits ( k ) - 1 downto 0 )
round_key	std_logic_vector ( 63 downto 0 )
round_counter	std_logic_vector ( 3 downto 0 )
final_tau1	std_logic_vector ( 63 downto 0 )
final_pi	std_logic_vector ( 63 downto 0 )
final_tau2	std_logic_vector ( 63 downto 0 )

Instantiations
gl	gamma <Entity gamma>
pl	pi <Entity pi>
tl	tau <Entity tau>
ks	key_schedule <Entity key_schedule>
final_t1	tau <Entity tau>
final_p	pi <Entity pi>
final_t2	tau <Entity tau>